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ERSA'10: July 13, 2010 Schedule

Last modified 2010-07-09 01:15

To select a different schedule CLICK HERE


6:45am - 5:00pm:  REGISTRATION (Second Floor, Conference Lobby: 1-5)


SESSION F:        FAULT TOLERANCE AND NETWORKS
                  Chair: TBA
                  July 13, 2010 (Tuesday); 08:00am - 10:10am
                  (LOCATION: Gold Room)

08:00 - 08:20am:  Evolutionary Dynamic Allocation of Relocatable Modules onto
                  Partially Damaged Xilinx FPGAs
                  X. Iturbe, K. Benkrid, T. Arslan, I. Martinez, M. Azkarate,
                  and A. Morales-Reyes
                  IKERLAN-IK4 Research Alliance, Basque Country, Spain;
                  The University of Edinburgh, Scotland, UK

08:20 - 08:40am:  Acceleration of FPGA Fault Injection Through Multi-Bit Testing
                  Grzegorz G. Cieslewski, Alan D. George, Adam M. Jacobs
                  University of Florida, Gainesville, Florida, USA

08:40 - 09:00am:  Towards Adaptive Networking for Embedded Devices based on
                  Reconfigurable Hardware
                  Enno Luebbers, Christian Plessl, Marco Platzner, Ariane Keller,
                  Bernhard Plattner
                  University of Paderborn, Germany; ETH Zurich, Switzerland

09:00 - 09:20am:  Partial Block-by-Block Reconfiguration for a Dynamic Optically
                  Reconfigurable Gate Array
                  Daisaku Seto and Minoru Watanabe
                  Shizuoka University, Japan

09:20 - 09:40am:  Distributed Reconfiguration
                  Avishek Chakraborty, David Kearney, Mark Jasiunas
                  University of South Australia, Reconfigurable Computing Lab., Australia

09:40 - 10:10am:  ERSA KEYNOTE:
                  Effective Integration of FPGAs into Commercial High-performance
                  Computing Applications
                  Tony Brewer
                  CTO, Convey Computer, USA
                  Moderator: Prof. David Andrews

10:20 - 10:40am:  BREAK


SESSION D1:       INVITED PANEL & PAPERS
                  RECONFIGURABLE SUPERCOMPUTING: PERFORMANCE, PRODUCTIVITY, & SUSTAINABILITY
                  Co-Chairs: Drs. Herman Lam and Greg Stitt;
                  University of Florida, USA
                  July 13, 2010 (Tuesday); 10:40am - 12:10pm
                  (LOCATION: Gold Room)

10:40 - 11:10am:  ERSA KEYNOTE:
                  Novo-G: A View at the HPC Crossroads for Scientific Computing
                  A. George, H. Lam, C. Pascoe, A. Lawande, G. Stitt
                  University of Florida, Gainesville, Florida, USA
                  Moderator: Prof. Ronald F. DeMara

11:10 - 11:30am:  INVITED PAPER:
                  Recent FPGA Advances and Challenges
                  Stephen Brown and Vaughn Betz
                  Altera Corporation, Toronto, Canada

11:30 - 11:50am:  INVITED PAPER:
                  Standards for Sustainability - Growing Markets and Improving Access
                  for Reconfigurable Supercomputing
                  Eric A. Stahlberg
                  President of OpenFPGA Inc. & Wittenberg University

11:50 - 12:10pm:  INVITED PAPER:
                  Targeting Cancer, One FPGA at a Time
                  R. Kent Koeninger
                  CEO of Veritomics, Inc.

12:20 - 01:20pm:  LUNCH (On Your Own)


SESSION D3:       INVITED PANEL / REGULAR PAPERS
                  RECONFIGURABLE SUPERCOMPUTING: PERFORMANCE, PRODUCTIVITY, &
                  SUSTAINABILITY
                  Co-Chairs: Drs. Herman Lam and Greg Stitt
                  University of Florida, USA
                  July 13, 2010 (Tuesday); 01:20pm - 02:20pm
                  (LOCATION: Gold Room)

01:20 - 01:40pm:  Performance Visualization and Exploration for Reconfigurable
                  Computing Applications
                  Seth Koehler and Alan D. George
                  University of Florida, Gainesville, Florida, USA

01:40 - 02:00pm:  An Open Source Circuit Library with Benchmarking Facilities
                  Mariusz Grad and Christian Plessl
                  University of Paderborn, Germany

02:00 - 02:20pm:  Declarative Programming with Handel-C
                  Lars Middendorf, Christophe Bobda
                  University of Potsdam, Germany


SESSION C3:       INVITED PANEL / REGULAR PAPERS
                  SIGNAL-IMAGE PROCESSING AND DYNAMIC PARTIAL RECONFIGURATION
                  Co-Chairs: Drs. Ronald F. DeMara and Jooheung Lee;
                  University of Central Florida, USA
                  July 13, 2010 (Tuesday); 02:20pm - 03:00pm
                  (LOCATION: Gold Room)

02:20 - 02:40pm:  DAPR: Design Automation for Partially Reconfigurable FPGAs
                  Shaon Yousuf and Ann Gordon-Ross
                  University of Florida, Gainesville, Florida, USA

02:40 - 03:00pm:  Hardware ORB Middleware for Distributed Smart Camera Systems
                  Ali Akbar Zarezadeh and Christophe Bobda
                  Universitat Potsdam, Germany

03:00 - 03:20pm:  BREAK


SESSION D2:       INVITED PANEL
                  RECONFIGURABLE SUPERCOMPUTING: PERFORMANCE, PRODUCTIVITY, & SUSTAINABILITY
                  Co-Chairs: Drs. Herman Lam and Greg Stitt;
                  University of Florida, USA
                  July 13, 2010 (Tuesday); 03:20pm - 04:20pm
                  (LOCATION: Gold Room)

03:20 - 04:20pm:  PANEL DISCUSSION


SESSION G & H:    SHORT PAPERS AND POSTERS
                  Chair: TBA
                  July 13, 2010 (Tuesday); 04:30pm - 05:20pm
                  (LOCATION: Gold Room)

                  O. A General Purpose FPGA Data Filter For Data Stream Processing
                     Pranav Vaidya, Yu Chen, Jaehwan John Lee, Chandima Hewa Nadungodage,
                     and Yuni Xia
                     Indiana University - Purdue University, Indianapolis, USA
                  O. Reconfigurable Logical Topology Design for Survivability in WDM Networks
                     Monish Chatterjee, Tanmay Karmy, Surajit Dutt, Swapan Bhattacharya,
                     and Uma Bhattacharya
                     Asansol Engineering College, India; Bengal Engineering and Science
                     University, India; National Institute of Technology, India
                  O. A Self-Reconfigurable Lightweight Interconnect for Scalable
                     Processor Fabrics
                     Heiner Giefers and Marco Platzner
                     University of Paderborn, Germany
                  O. Parameterized AND-OR Trees for FPGA Design Space Exploration
                     Andrew Dittes, Srikanth Nadella, Jack Jean
                     Wright State University, Dayton, Ohio, USA
                  O. An Architecture of Prototyping System for Dynamic Partial
                     Reconfiguration on FPGA
                     Akira Yamawaki and Seiichi Serikawa
                     Kyushu Institute of Technology, Japan
                  O. Persistent CAD for in-the-field Power Optimization
                     Peter Jamieson
                     Miami University, Ohio, USA
                  O. An Field-Programmable VLSI Based on Synchronous/Asynchronous
                     Hybrid Architecture
                     Masanori Hariyama, Ryoto Tsuchiya, Shota Ishihara, Michitaka Kameyama
                     Graduate School of Information Sciences, Tohoku University, Japan
                  O. Implementing Error Detection and Error Correction with Explicit
                     Area Constraints
                     David L. Foster and Darrin M. Hanna
                     Kettering University, USA;
                     Oakland University, USA
                  O. Mapping for a Heterogeneous Multi-Core Media Processor Considering
                     the Data Transfer Time
                     Hasitha Muthumala Waidyasooriya, Daisuke Okumura, Masanori Hariyama,
                     and Michitaka Kameyama
                     Tohoku University, Japan
                  O. A Model-Based Design Approach For Realizing Signal Processing Systems
                     in FPGAs
                     Rhonda Gaede, David Moody, Michael Adderley, Charles Fulks,
                     Laurie Joiner, Jeffrey Kulick
                     University of Alabama, Huntsville, Alabama, USA
                  O. Application-Independent FPGA-based Profiling
                     Fadi Obeidat and Robert Klenke
                     Virginia Commonwealth University, Virginia, USA
                  O. FPGA-Accelerated Floating-Point Customization on Extensible
                     Computing Systems
                     Zhanpeng Jin, Richard Neil Pittman, Alessandro Forin
                     University of Pittsburgh, USA;
                     Microsoft Research, Redmond, USA
                  O. FPGA for Computing the Pixel Purity Index Algorithm on Hyperspectral
                     Images
                     Carlos Gonzalez, Daniel Mozos, Javier Resano, Antonio Plaza
                     Complutense University of Madrid, Spain; University of Zaragoza, Spain;
                     University of Extremadura, Spain

05:20 - 05:40pm:  FPGA-Accelerated Floating-Point Customization on Extensible
                  Computing Systems
                  Zhanpeng Jin, Richard Neil Pittman, Alessandro Forin
                  University of Pittsburgh, USA;
                  Microsoft Research, Redmond, USA

06:00 - 09:00pm:  KEYNOTES & INVITED PRESENTATIONS + TUTORIALS
                  (Please see the lists at the begining of this booklet)




To select a different schedule CLICK HERE


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