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ESA'09: July 15, 2009 Schedule

Last modified 2009-06-20 14:08

To select a different schedule CLICK HERE

6:45am - 5:00pm:  REGISTRATION (Second Floor, Conference Lobby: 1-5)

                  Chair: Prof. Charles E. Stroud, Auburn University, Auburn, Alabama, USA
                  July 15, 2009 (Wednesday); 08:00am - 12:20pm
                  (LOCATION: Gold Room)

08:00 - 08:20am:  D-Torus Topology in Networks-on-Chip: A perspective study
                  Vivek Kumar Sehgal, Rohit Sharma, Nitin, Deepankar Bhardwaj,
                  Yaras Agarwal, Mehboob Shrivastava, Prashant Srivastava, Avinash Kumar
                  Jaypee University of Information Technology, India

08:20 - 08:40am:  State Identification in Temporal Moore Machines
                  Norbert Giambiasi
                  LSIS: Laboratoire des Sciences de l'Information et des Systemes,
                  University Paul Cezanne, France

08:40 - 09:00am:  Built-in Self-test of Embedded SEU Detection and Correction Cores
                  in Virtex-4 and Virtex-5 FPGAs
                  Bradley F. Dutton and Charles E. Stroud
                  Auburn University, USA

09:00 - 09:20am:  Rapid Energy Estimation for Embedded Soft-Core Microprocessors
                  Yuan He, Morteza Biglari-Abhari, Zoran Salcic
                  University of Auckland, New Zealand

09:20 - 09:40am:  Automatic HW/SW Interface Generation for Seamless Integration
                  from Object-Oriented Models
                  Jesus Barba, Fernando Rincon, Francisco Moya, David Villa,
                  Felix J. Villanueva, Juan C. Lopez
                  University of Castilla-La Mancha, Spain

09:40 - 10:00am:  Nintendo-DS: A Pedagogical Approach to Teach Computer Architecture
                  Maria J. Santofimia, Francisco Moya
                  University of Castilla-La Mancha, Spain

10:00 - 10:20am:  Embedded Processor Based Fault Injection and SEU Emulation for FPGAs
                  Bradley Dutton, Mustafa Ali, Charles Stroud, and John Sunwoo
                  Auburn University, USA &
                  Electronics and Telecommunications Research Institute, Korea

10:20 - 10:40am:  BREAK

10:40 - 11:00am:  NEXUS Capabilities for Embedded Software and Hardware Validation
                  Juan Pardo, Jose Carlos Campelo, Juan Jose Serrano
                  Technical University of Valencia, Spain

11:00 - 11:20am:  Technologies for the Development of Dependable and Secure
                  Component-Based Embedded Systems: TecnoSeC Project
                  Jose Carlos Campelo and Juan Pardo
                  Technical University of Valencia, Spain

11:20 - 11:40am:  Non-Intrusive Tool for Verifying COTS Components in Embedded Systems
                  Juan Pardo, Jose-Carlos Campelo, Juan-Jose Serrano
                  Technical University of Valencia, Spain

11:40 - 12:00pm:  Reconfigurable Global Network Local Bus (RGNLS): A Hybrid On-Chip
                  Communication Architecture for Area-Efficient, Dynamically
                  Reconfigurable SoC Designs
                  Ling Wang, Dongxin Wen, Jianwen Zhang, Yingtao Jiang
                  Harbin Institute of Technology, P. R. China

12:00 - 12:20pm:  Enhancing Processor's Throughput in Small Embedded Systems
                  Moshe Pelleh
                  HIT, Israel

12:20 - 02:00pm:  LUNCH (On Your Own)

02:00 - 06:00pm:  During this period, ESA'09 attendees are encouraged to participate
                  in sessions belonging to PDPTA'09, CDES'09, SERP'09, ICWN'09,
                  SAM'09, FECS'09, or ERSA'09.  These sessions discuss topics that
                  significantly overlap the scope of ESA'09.

                  (Please see the lists at the begining of this booklet)

To select a different schedule CLICK HERE

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